This section looks at Cyclicity CDL's types from a more human
CDL types are a tool for abstracting from simple bit vectors or
collections of bit vectors to a higher level. They are a basic tenet
of all modern languages, and certainly an assist even for hardware
description languages; VHDL and SystemVerilog support them, for
The types in CDL have a range of abilities and restrictions:
CDL's types are defined to be fully known at compile-time, to
allow for compile-time type checking.
CDL's types are basically driven from some very simple basic
types, and CDL does not support the plethora of types that, for
example, SystemVerilog does; CDL's basic types are focussed on
producing working hardware descriptions, not on testbench code.
CDL supports structures, which are collections of other
types. These allow, for example, a single variable to contain a set
of flags and data, without requiring individual variables for each.
CDL supports enumerations; these